Optimization of threshold voltage window under tunneling program/erase in nanocr

2020-02-29 21:25:47

NC memory window oxide interpoly

责任者: Compagnoni, C.M.;Ielmini, D.;Spinelli, A.S.;Lacaita, A.L. 单位: Dipt. di Elettronica e Informazione, Politecnico di Milano-IU.NET, Milan, Italy 来源出处: IEEE Transactions on Electron Devices(IEEE Trans. Electron Devices (USA)),2005/11/,52(11):2473-81 摘要: This paper analyzes solutions to improve the program/erase (P/E) window for nanocrystal (NC) memory cells, by means of the model presented in our previous work . The limited threshold voltage (VT) window typically observed in the Fowler-Nordheim (FN) programming regime for NC memories was shown to be a direct consequence of the lack of any conduction and ε mismatch between the tunnel and the interpoly-oxide at steady-state. This condition can be avoided when tunnel oxide conduction is due to direct tunneling, but to assure sufficiently short P/E times very thin oxides are required, sacrificing cell nonvolatility. The use of alternative materials for interpoly dielectric, gate and NC is investigated. Finally, barrier engineering is presented as a valid way to improve the available VT window 关键词: flash memories;nanostructured materials;semiconductor device models;semiconductor storage;tunnelling;nanocrystal memory;program/erase window;P/E window;threshold voltage;NC memory cells;Fowler-Nordheim programming;FN programming;interpoly-oxide;tunnel oxide conduction;direct tunneling;cell nonvolatility;interpoly dielectric;barrier engineering;flash memory;semiconductor device modeling