A floating well method for exact capacitance-voltage measurement of nano technol

2020-01-01 03:42:50

method measurement electron oxide capacitance

责任者: Hung-Der Su;Bi-Shiou Chiou;Shien-Yang Wu;Ming-Hsung Chang;Kuo-Hua Lee;Yung-Shun Chen;Chih-Ping Chao;Yee-Chaung See;Sun, J.Y.-C. 单位: Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsin-Chu, Taiwan 来源出处: IEEE Transactions on Electron Devices(IEEE Trans. Electron Devices (USA)),2003/06/,50(6):1543-4 摘要: Small gate area with short gate length reduces the C-V distortion of ultrathin oxide devices, but results in high parasitic capacitance/total capacitance ratio. The floating well method can exclude the parasitic capacitance to obtain accurate inversion oxide thickness without using any dummy pattern. It is suitable for nano technology 关键词: capacitance measurement;nanotechnology;semiconductor device measurement;floating well method;capacitance-voltage measurement;nanotechnology;ultrathin oxide device;parasitic capacitance;electrical oxide thickness;inversion capacitance